1. Field of the Invention
The invention relates to high voltage semiconductor devices, and in particular, to high voltage devices integrated with a Schottky diode device.
2. Description of the Related Art
High voltage semiconductor device technologies are applicable to high-voltage and high-power integrated circuit regimes. Specifically, conventional high voltage semiconductor devices are adopted in applications mainly driven by at least 18V. High voltage technologies are advantageous for fulfilling cost benefits and compatible with other semiconductor process. Therefore, high voltage devices are widely applied to display driving IC devices, power supply devices, communication devices, car electronics devices and industrial control devices.
FIG. 1A is a cross section of a conventional N type lateral diffused metal oxide semiconductor (N-LDMOS) device. In FIG. 1A, an N type lateral diffused metal oxide semiconductor device 10 includes a semiconductor substrate 110, and a P-body region 115 formed in a first region 10I of the semiconductor substrate 110. An N-drift region 120a is formed in the second region 10II of the semiconductor substrate 110. An isolation region 135 is disposed on the semiconductor substrate defining an active region. A gate dielectric layer 145 is disposed on the semiconductor substrate with one end extending overlying part of the isolation region 135 and the other end exposing source regions 140a and 140b on the surface of the P-body region, wherein the region 140a is a P type heavily doped region, and the region 140b is an N-type heavily doped region. A polysilicon gate 150 is disposed on the gate dielectric layer 145 with one end extending to overly the isolation region 135. An N+ doped region 130 is formed in the N-drift region 120a and contacted with a second end of the isolation region to serve as a drain region of the N-LDMOS device 10.
In order to achieve a high voltage N-LDMOS device, a lightly doped N-drift region is adopted to serve as a high voltage structure and other techniques such as a reduced surface field (RESURF) method and a field plate method are performed to achieve optimum adaptation of the N-LDMOS devices.
FIG. 1B is a cross section illustrating a conventional Schottky diode device. In FIG. 1B, the conventional Schottky diode device 20 includes a semiconductor substrate 110. A N-drift region 120b is formed in upper portion of the semiconductor substrate. An isolation region 135 is disposed on the semiconductor substrate, thereby defining active device regions including an anode region and a cathode region. A pair of P type doped well 125a and 125b are disposed in the N-drift region 120b corresponding to both sides of the anode region. An inter-layered dielectric (ILD) layer 140 is formed overlying the semiconductor substrate 110 defining an anode contact region and a cathode contact region. A Schottky junction 122 is created between an anode electrode 160a and the N-drift region 120b. An N+ doped region 130 is formed on the N-drift region 120b corresponding to the cathode region and electrically contacted with the cathode electrode 160b. 
In order to achieve a high voltage Schottky diode device, a lightly doped N-drift region is typically adopted to serve as a high voltage structure. When the N-LDMOS device and the Schottky diode device are integrated with an integrated circuit, however, the same concentrated doped N-drift regions 120a and 120b are not suitable for the N-LDMOS device and the Schottky diode device, respectively. In this regard, different concentrated doped N-drift regions must be respectively formed in the N-LDMOS device and the Schottky diode device, resulting in demand for additional photo-masks during fabrication, thus leading to higher fabrication costs.